Phase and Delay in Corporate-Fed Arrays
نویسنده
چکیده
Distribution of phase end delay in corporate-fed phased arrays is examined. RMS phase errors versus scan angle are shown for digital phasers. Phaser bits should all b e located a t each element. Delayer bits can b e also, but delayer loss, dispersion, temperature sensitivity, and size mitigate against using so many delayers. Alternative topologies, where delay bits are distributed in the corporate feed, are examined.
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